03.25.2025 Webinar – Introduction to the Five Pillars of Data Acquisition

Date: Tuesday March 25, 2025
Time: 10:00AM Pacific | 1:00PM Eastern
Duration: 25 minutes

Topics covered in this webinar: 

  • Analog front-end (AFE) purpose and characteristics
  • Clocking and triggering – concepts and use-cases
  • Use of general-purpose input/output (GPIO) for system-level design
  • Real-time digital signal processing and field-programmable gate arrays (FPGAs)

Who should attend? Developers interested in learning more about data acquisition concepts using high-performance digitizers.

What attendees will learn? Important aspects related to digitizer operation and data acquisition system-level design.

Presenter: Nicklas Gilbertsson, Senior Digital Marketing Specialist

 

REGISTER HERE

 

 

Webinar Series: Oscilloscope Probing in Power Electronics — What to Use and Why

Oscilloscope Probing in Power Electronics – What to Use and Why

Power electronics designs have inherent measurement challenges. Proper probe selection and use is critical for operator, equipment and DUT safety and also has a large influence on the accuracy of the measurement. Join Teledyne LeCroy as we describe what high voltage and isolated probes are best suited to each measurement.

Part 1: How to Choose the Correct High Voltage Probe

Date: April 2, 2025
Time: 11:00AM Pacific | 2:00PM Eastern
Duration: 60 mins including live Q&A

In part 1, we’ll discuss how to choose the correct high voltage probe, taking into consideration the application and the accuracies required, and the safety of the operator, equipment, and DUT. The difference between the “right” probe and the “wrong” probe is usually not black and white, but more of a shade of gray.

Topics covered in this webinar: 

  • Important probe specifications
  • Probe architectures, types and characteristics
  • Probe fit to various applications

Who should attend? Any engineer who is probing in any type of power conversion system with floating voltages above 12 V.

What attendees will learn? Attendees will gain a thorough understanding of the different types of HV probes and how to choose the best probe for the specific application.

Presented by: Ken Johnson, Director of Marketing; Jon Shechter, Product Marketing Engineer; William Kaunds, Product Marketing Manager

 

Part 2: Real-World High Voltage Probing Comparisons – Highlighting Basic Specification and Performance Differences

Date: May 21, 2025
Time: 11:00AM Pacific | 2:00PM Eastern
Duration: 60 mins including live Q&A

In part 2, we’ll use basic probe comparisons with simple measurements on lower-speed high voltage signals to draw attention to the performance degradations of probes with seemingly “normal” specifications, and describe why these performance degradations occur.

Topics covered in this webinar: 

  • Comparison of “older” and more recent vintage HV differential probes from multiple manufacturers
  • “Best-in-class” equipment from 20 years ago
  • Price vs. performance – you often get what you pay for
  • Instrument isolated inputs versus HV isolated probes

Who should attend? Any engineer who is probing in any type of power conversion system with floating voltages above 12 V.

What attendees will learn? Attendees will gain a better understanding of how to identify a measurement problem caused by a poorly performing probe or a misapplied probe.

Presented by: Ken Johnson, Director of Marketing; Jon Shechter, Product Marketing Engineer; William Kaunds, Product Marketing Manager

Part 3: Real-World High Voltage Probing Comparisons – Specialized HV Optical Probes and 60V Common-mode Probes

Date: June 25, 2025
Time: 11:00AM Pacific | 2:00PM Eastern
Duration: 60 mins including live Q&A

In part 3, we’ll improve on our understanding of high voltage probing by using higher-speed signaling (consistent with GaN and SiC devices) and highlighting what can be expected from HV optical probes or other application-optimized probes. We’ll apply everything already learned in Parts 1 and 2, but add significant measurement challenges to the probes to further differentiate their performance capabilities and characteristics.

Topics covered in this webinar: 

  • HV optical probe topologies – how are they constructed?
  • Performance tradeoffs of optical vs. electrical probes
  • Optimized probes for 60 V common-mode applications

Who should attend? Any engineer who is probing in any type of power conversion system with floating voltages above 12 V.

What attendees will learn? Attendees will gain a better understanding of how to identify a measurement problem caused by a poorly performing probe or a misapplied probe.

Presented by: Ken Johnson, Director of Marketing; Jon Shechter, Product Marketing Engineer; William Kaunds, Product Marketing Manager

 

REGISTER HERE

 

Can’t attend live? Register anyway and you will receive an email with the recording and slides after the live event.

In the Lab with Eric Bogatin Best PCB Design & Measurement Practices Webinar Series

Join Teledyne LeCroy and Professor Eric Bogatin for this series of 60-minute webinars that describe how to design, build, test, measure and debug your assembled printed circuit board. These webinars serve as a springboard for further learning. Each topic will be explored further through a series of videos and coursework through the Teledyne LeCroy Signal Integrity Academy, available soon. Access the 2024 Series Sessions here

Part 12: Measuring and Controlling ESD Events

Available on Demand
Aired February 13

In this webinar, Eric describes how to minimize electrostatic discharge (ESD) and electrostatic damage to circuits in your lab, and how to use an Arduino-based E-field meter to allow you to measure the static fields from charged surfaces so that you can anticipate and plan for circuits that need additional protection.

Part 13: Four Tips to Reduce Noise Using Good Layout/Design Practices

Date: April 10, 2025
Time: 11:00AM Pacific | 2:00PM Eastern
Duration: 60 mins

In this webinar, Eric describes using an oscilloscope in the most effective way possible by minimizing the noise from measurement artifacts and using best measurement practices to optimize SNR. Eric will describe common do’s and don’ts, how to optimize the signal into the oscilloscope, measuring signals correctly, and much more.

Part 14: Four Tips to Reduce Noise Using Good Layout/Design Practices

Date: June 12, 2025
Time: 11:00AM Pacific | 2:00PM Eastern
Duration: 60 mins

In this webinar, Eric describes why differential signaling is more robust and less sensitive to ground-plane noise than single-ended signaling, and how to measure ground-plane noise signal integrity problems in your PCB.

Part 15: Three Ways to Measure Current Draw and Inrush Current in Power Rails

Date: August 14, 2025
Time: 11:00AM Pacific | 2:00PM Eastern
Duration: 60 mins

In this webinar, Eric describes three different techniques to measure the steady-state and inrush current in a board, which is easy to do with any oscilloscope. Measuring these currents is important when developing power budgets for your next design.

Part 16: The Role of Vias in Reducing Crosstalk

Date: October 9, 2025
Time: 11:00AM Pacific | 2:00PM Eastern
Duration: 60 mins

In this webinar, Eric describes the root cause of noise generated when signals transition from one layer to another through vias in multilayer boards, and how to measure and reduce the noise and related signal integrity problems.

Part 17: When to Use Ferrites in the Power Distribution Network (PDN)

Date: December 11, 2025
Time: 11:00AM Pacific | 2:00PM Eastern
Duration: 60 mins

In this webinar, Eric describes the proper use of ferrites in your board design, and typical mistakes (and their ramifications) when ferrites are misapplied.

Part 18: Best Measurement Practices to Get the Most Out of Your Passive Probes
Not yet open for registration

Date: February 12, 2026
Time: 11:00AM Pacific | 2:00PM Eastern
Duration: 60 mins

In this webinar, Eric provides practical guidance on when and how to use your passive probes so as to avoid introducing measurement artifacts.

REGISTER HERE

All registrants will receive a copy of the recording and slides after the live event.

Access the 2024 Series Sessions here

04.03.2025 Webinar: What’s new for SecureSync®?

What’s new for SecureSync®?

Join us for the second episode of our Sync with an Expert webinar series, where our timing experts dive into how precise timing can improve your bottom line. This session features Ron Dries, Solutions Architect/System Engineer, and Daniel Fidalgo, Application Engineer, as they explore the WROX option card—a powerful upgrade for SecureSync® 2400.

Discover how this small addition enhances network timing connectivity, boosts NTP and PTP capacity, and unlocks higher synchronization performance using the White Rabbit Timing Protocol.

🔹 Date: April 3rd, 2025
🔹 Time: 1pm EST

REGISTER HERE

 

 

04.30.2025 Webinar: Your USB4® and DisplayPort™ Designs Will Fail Unless You Understand Link Training

Date: Wednesday, April 30, 2025
Time: 11:00AM Pacific | 2:00PM Eastern
Duration: 60 mins including live Q&A

Your USB4® and DisplayPort™ Designs Will Fail Unless You Understand Link Training

Consumers are increasingly frustrated with USB Type-C ports not operating as specified or having intermittent link failure issues. If your designs pass compliance test but fails at interoperability workshops then you need to learn more about link training debug – The recent introduction of retimers into system designs has increased the number of issues seen by product integrators.

Topics covered in this webinar: 

  • What function does a retimer or LTTPR perform?
  • Why do these problems exist with USB4 but not USB 3.2?
  • What are the differences in SoC and retimer designs amongst vendors?
  • Practical synchronous capture test setup for debug
  • Introduction to cross-layer analysis (physical and link layer)
  • Real-world debug examples

Who should attend? System, firmware and signal integrity engineers designing and testing USB4 and DisplayPort links and devices.

What attendees will learn? Why products pass compliance but fail interoperability, and how to apply new debug techniques to learn the root cause of interoperability failures.

Presented by: Mike Engbretson, Product Marketing Manager, Teledyne LeCroy
Giulio Fabbro, High-speed Serial Data Specialist, EMEA, Teledyne LeCroy
Matthew Neighbour, Senior Hardware Applications Engineer, Kandou Bus

 

REGISTER HERE

 

Can’t attend live? Register anyway and you will receive an email with the recording and slides after the live event.

05.07.2025 Webinar: PCI Express® 6.0 Electrical Compliance Test Overview

Date: Wednesday, May 7, 2025
Time: 11:00AM Pacific | 2:00PM Eastern
Duration: 60 mins including live Q&A

PCI Express® 6.0 Electrical Compliance Test Overview

PCIe® 6.0 compliance and interoperability testing has begun. Join Teledyne LeCroy as we focus on each electrical test, explain the background theory, test procedures and how electrical pass/failure is defined. We also describe what’s new, what’s the same as past generations, and how to avoid the most common test pitfalls.

Topics covered in this webinar: 

  • What’s New in PCIe 6.0 Compared to PCIe 5.0
  • Transmitter Electrical Testing
  • Transmitter Link Equalization Testing
  • Receiver Link Equalization Testing
  • PLL Bandwidth Testing
  • Reference Clock Testing

Who should attend? Design, validation, and test engineers working on or who expect to expect to work on PCIe 6.0 devices or systems.

What attendees will learn? Changes in PCIe 6.0 compared to PCIe 5.0, and how to be prepared for a PCIe 6.0 electrical compliance test events.

Presented by: Anthony Mickens, Product Marketing Manager

 

REGISTER HERE

 

Can’t attend live? Register anyway and you will receive an email with the recording and slides after the live event.

06.18.2025 Webinar: Getting the Details Right for Oscilloscope DDR Read/Write Separation

Date: Wednesday, June 18, 2025
Time: 11:00AM Pacific | 2:00PM Eastern
Duration: 60 mins including live Q&A

Getting the Details Right for Oscilloscope DDR Read/Write Separation

Join Teledyne LeCroy as we describe the intricacies of correctly and consistently separating DDR read and write bursts using a combination of oscilloscope hardware triggering, zone/visual triggering, and other software algorithms.

Topics covered in this webinar: 

  • How DDR Read/Write separation differs for each DDR standard
  • Advantages and pitfalls of Zonal/Visual triggering
  • Using long acquisition memory and specialized software algorithms
  • Hardware triggering for foolproof separation
  • Balancing cost, setup time, and separation accuracy
  • Reference Clock Testing

Who should attend? Design engineers using DDR or LPDDR in embedded system designs.

What attendees will learn? The differences between the various DDR read/write separation methods and what works (and why) for various DDR standards.

Presented by: Sriram Venkatesha, Product Marketing Manager

 

REGISTER HERE

 

Can’t attend live? Register anyway and you will receive an email with the recording and slides after the live event.