07.25.2024 2024 Oscilloscope Coffee Break Webinar Series Part 7: How Does an Oscilloscope Probe Affect My Oscilloscope Gain Settings, Accuracy, Noise, and Dynamic Range?

 

Date: Thursday, July 25
Time: 2PM Eastern
Duration: 30 minutes, Includes Live Q&A

 

In this webinar we explain what happens to the oscilloscope when a probe is connected to an oscilloscope input and how the oscilloscope operating characteristics are changed with the probe connected even if this is not made obvious to the user.

 

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Can’t attend live? Register anyway and you will receive an email with the recording and slides after the live event.

08.08.2024 In the Lab with Eric Bogatin, 2024 Edition – Best PCB Design & Measurement Practices Webinar Series – Part 7: Getting the Lead Out – Expert Soldering Tips

 

Date: Thursday, August 8
Time: 2PM Eastern / 11AM Pacific

 

In this webinar, Eric provides practical guidance about how to create good solder joints by satisfying the three important conditions for temperature, cleanliness, and solder flux.

 

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Can’t attend live? Register anyway and you will receive an email with the recording and slides after the live event.

08.22.2024 2024 Oscilloscope Coffee Break Webinar Series Part 8: When Do I Need to Deskew Channels or Probes on an Oscilloscope?

 

Date: Thursday, August 22
Time: 2PM Eastern
Duration: 30 minutes, Includes Live Q&A

 

In this webinar we’ll explain what propagation delay is and what deskew does on a digital oscilloscope to correct for propagation delay differences between oscilloscope input channels and probes. We’ll also describe when you should spend the time to perform a precision deskew and when you can ignore this step.

 

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Can’t attend live? Register anyway and you will receive an email with the recording and slides after the live event.

09.11.2024 How to Debug DisplayPort™ 2.0 PHY-logic and Sideband Link Layers

 

Date: Wednesday, September 11
Time: 11AM Pacific | 2PM Eastern
Duration: 60 minutes

How to Debug DisplayPort 2.0 PHY-logic and Sideband Link Layers

This webinar tackles common issues that arise when connecting USB-C devices and ensures they work together smoothly (compliance and interoperability). We’ll show you practical debugging techniques to fix electrical problems and make sure your devices meet all VESA specifications.

Topics to be covered in this webinar:

  • What happens when you attach the USB-C cable?
  • Probing at compliance test points (TP2, TP3)
  • Debugging Power Delivery (USB-PD) and Alt-Mode Issues
  • Debugging main link and AUX linkup issues

Who should attend? System Engineers, Firmware Engineers, and USB IC Field Support Engineers.

What attendees will learn: Practical methods for uncovering compliance and interoperability issues using an oscilloscope.

Presenters: Mike Engbretson, Teledyne LeCroy Product Marketing Manager

 

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Can’t attend live? Register anyway and you will receive an email with the recording and slides after the live event.

09.12.2024 In the Lab with Eric Bogatin, 2024 Edition – Best PCB Design & Measurement Practices Webinar Series – Part 8: Understanding On-die Rail Voltages by Measuring Quiet High and Low Signals

 

Date: Thursday, September 12
Time: 2PM Eastern / 11AM Pacific

 

In this webinar, Eric describes a simple hex inverter circuit and demonstrates how to probe a quiet HIGH or LOW signal in the circuit to “sniff” the power rail voltage (HIGH) or the ground voltage (LOW) on the die.

 

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Can’t attend live? Register anyway and you will receive an email with the recording and slides after the live event.

09.17.2024 How to Test In-vehicle Networks (IVN) Webinar Series Part 3: How to Debug In-vehicle Network (IVN) Bus Systems

 

Date: Tuesday, September 17, 2024
Time: 11:00AM Pacific | 2:00PM Eastern

 

We will look at IVN link communication and explore how to debug and troubleshoot both Point-to-Point and Multidrop architectures using an oscilloscope and how to analyze both the physical and the protocol layers.

 

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Can’t attend live? Register anyway and you will receive an email with the recording and slides after the live event.

09.25.2024 How to Become an Expert in DDR Memory Test Webinar Series – Part 1: Fundamentals of DDR Memory Testing

 

Presenter: Sriram Venkatesha, Project Manager
Date: Wednesday, September 25, 2024
Time: 11:00AM Pacific | 2:00PM Eastern

 

In this webinar, we’ll be offering a comprehensive introduction to DDR interfaces along with the challenges encountered during testing. We will focus particularly on distinguishing between validation and compliance testing requirements, as well as preparing for DDR memory testing.

 

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Can’t attend live? Register anyway and you will receive an email with the recording and slides after the live event.

09.26.2024 2024 Oscilloscope Coffee Break Webinar Series Part 9: What is a Digital Phosphor Oscilloscope?

 

Date: Thursday, September 26
Time: 2PM Eastern
Duration: 30 minutes, Includes Live Q&A

 

In this webinar we’ll explain what is meant by a digital phosphor oscilloscope (DPO), a phrase used by Tektronix to describe their fast update rate technology. We’ll also provide an overview of the benefits and limitations of fast update rate technologies.

 

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Can’t attend live? Register anyway and you will receive an email with the recording and slides after the live event.

10.09.2024 How to Become an Expert in DDR Memory Test Webinar Series – Part 2: Tips and Techniques for DDR Probing

 

Presenter: Mike Hertz, Senior Field Applications Engineer
Date: Wednesday, October 9, 2024
Time: 11:00AM Pacific | 2:00PM Eastern

 

In this webinar, we get specific on how to address real-world probing and connectivity issues that impact DDR measurement capabilities. We will provide examples of what to do or not do and a pre-compliance test checklist will be reviewed.

 

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Can’t attend live? Register anyway and you will receive an email with the recording and slides after the live event.

10.10.2024 In the Lab with Eric Bogatin, 2024 Edition – Best PCB Design & Measurement Practices Webinar Series – Part 9: Measuring Crosstalk Between Signal Return Loops

 

Date: Thursday, October 10
Time: 2PM Eastern / 11AM Pacific

 

In this webinar, Eric demonstrates how two different interconnect approaches (continuous ground plane and adjacent return trace) will affect the amount of crosstalk between an aggressor and victim signal-return path pair.

 

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Can’t attend live? Register anyway and you will receive an email with the recording and slides after the live event.