03.21.2023 Webinar – Introduction to High-Level Synthesis (HLS)

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Learn the basics of how HLS helps simplify FPGA firmware development for high-performance digitizers

Date: Tuesday, March 21, 2023
Time: 10 AM Central European Time (CET)
Duration: 35 minutes


Join Teledyne SP Devices for an introductory webinar on HLS in the context of high-performance digitizers.

Topics covered in this webinar:

  • Benefits of onboard FPGA signal processing
  • FPGA architecture and development basics
  • Programming languages and development tools
  • Application areas and signal processing examples

Who should attend? Developers that want to learn more about the possibilities and benefits of onboard digital signal processing in high-performance digitizers.

What attendees will learn? An introduction to FPGA development for high-performance digitizers.

Presented by: Thomas Elter, Senior Field Applications Engineer