9/30/2020 – Teledyne LeCroy Webinar: Power Integrity of Multi-Rail Embedded Designs

Date: Wed, September 30, 2020
Time: 11AM Pacific | 2PM Eastern
Duration: 90 minutes

Register Here

Join Teledyne LeCroy for this hands-on webinar to learn how to characterize and validate the integrity of multiple power rails in a PDN network. The interactions and control of VRM’s, POL’s, LDO’s by Power Management ICs in embedded designs will be analyzed in this webinar.

Topics to be covered in this webinar:

  • Best practices for power rail probing
  • Multi-rail static and transient power analysis
  • Validation of start-up and shutdown delays and sequences
  • Correlation of embedded serial control signals - I2C, SMBus, PMBus, and SPMI - to power management events

Pre-work Recommended Before Hands-on Webinar

It is recommended that prior to the start of the webinar you should download and register (at no cost) MAUI Studio and download LabNotebook (waveform plus setup files) .lnb files (they will be combined into one .zip file that will need extracting).

MAUI Studio
>> https://teledynelecroy.com/mauistudio/

Zip file with Lab Notebook files
>> Click here to download the zip file

These files will allow you to load the various waveform examples shown during the webinar and participate in hands-on instruction on how to make critical power integrity measurements.

Who should attend? Engineers and technicians validating and debugging power integrity issues in embedded designs.

What attendees will learn? Engineers and technicians validating and debugging power integrity issues in embedded designs.

Presenter: Steve Murphy, Teledyne LeCroy Marketing Product Specialist, Applications Engineer

Can't attend live? Register anyway, and we will send you the recording and slides afterward.

Register Here