Date: Wednesday, June 18, 2025
Time: 11:00AM Pacific | 2:00PM Eastern
Duration: 60 mins including live Q&A
Getting the Details Right for Oscilloscope DDR Read/Write Separation
Join Teledyne LeCroy as we describe the intricacies of correctly and consistently separating DDR read and write bursts using a combination of oscilloscope hardware triggering, zone/visual triggering, and other software algorithms.
Topics covered in this webinar:
- How DDR Read/Write separation differs for each DDR standard
- Advantages and pitfalls of Zonal/Visual triggering
- Using long acquisition memory and specialized software algorithms
- Hardware triggering for foolproof separation
- Balancing cost, setup time, and separation accuracy
- Reference Clock Testing
Who should attend? Design engineers using DDR or LPDDR in embedded system designs.
What attendees will learn? The differences between the various DDR read/write separation methods and what works (and why) for various DDR standards.
Presented by: Sriram Venkatesha, Product Marketing Manager
| REGISTER HERE |
Can’t attend live? Register anyway and you will receive an email with the recording and slides after the live event.